To many engineers, clock selection involves nothing more than identifying a clock that will generate the necessary frequency or frequencies/output format, including it in the design, and moving on.
Hierarchical test methodologies are being broadly adopted for large designs. They provide roughly an order of magnitude better ATPG (automatic test program generation) run time, reduce workstation ...
In the 1980s, as giant technology companies competed to create electronics that arrived in the most compact, grey boxes possible, a young designer named Daniel Weil was doing the exact opposite: ...